A Solution of wordsize enlargement problem in fft processor

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A Solution of wordsize enlargement problem in fft processor

Author:

1Manish Mishra, 2Shikha Srivastava, 3Nishu Rai and 4Vikas Tripathi

Affiliation:

^1,2,4Department of Electronics, D.D.U, Gorakhpur University,Gorakhpur India

³Department of Electronics and Communication Engineering, Suysh Institute of Technology, Gorakhpur India

¹Email:-mmanishm@yahoo.com

Keyword:

Decimation in time, Fast Fourier Transform, Global Weighting Register, Butterfly.

Issue Date:

August 2011

Abstract:

One of the most difficult problems to overcome when implementing FFT algorithm in fixed point arithmetic is that of word size enlargement. Here in this paper a novel scheme is proposed to overcome this problem using SD butterfly processor. The proposed SD butterfly processor can handle a word size of 64 bit without any overflow or data loss and at the same time maintaining accuracy of data at the output.

Pages:

325-330

ISSN:

2319-8052 (Online) - 2231-3478 (Print)

Source:

Vol.23 - No.2

PDF:

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DOI:

jusps-B

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Copy the following to cite this article:

1Manish Mishra, 2Shikha Srivastava, 3Nishu Rai and 4Vikas Tripathi , "A Solution of wordsize enlargement problem in fft processor ", Journal of Ultra Scientist of Physical Sciences, Volume 23, Issue 2, Page Number 325-330, 2016

Copy the following to cite this URL:

Available from: http://ultraphysicalsciences.org/paper/619/

This work is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License